STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Change IWDG reload and prescaler live

Posted on June 07, 2013 at 17:32Following my last post on the subject of flash memory erase vs watchdog I have another concern.Reading the spec I believe that I may be able to change the prescaler+reload of my watchdog just for the time that the fla...

timer 2 and its channel

Posted on August 20, 2013 at 16:57Hello,I am working for 6 months with the Timer 2 of a STM32L15x.I use the channel 2 to capture the timer value; The pin used is PB3.My application is working fine.Now, for an hardware problematic, I need to use the ...

USB_OTG_FS on the STM3240G-EVAL?

Posted on August 21, 2013 at 01:04I can't get USB_OTG_FS communication to work on the STM3240G-EVAL board. USB_OTG_HS works with no problem. I tried disabling HS using JP31, but ST's example application still can't reach the USB_OTG_FS.I thought thi...

mattscar by Associate II
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Bit Band access to AHB2 Peripherals on STM32F373

Posted on August 20, 2013 at 17:12 Hello, I am trying to access GPIOB registers on STM32F373 using bit banding memory access. Per the documentation, all the peripheral registers are mapped to bid-band memory locations. While it is easy to ...

omri by Associate
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STM32L152 ADC DMA restart question

Posted on August 20, 2013 at 17:35 Hi, I'm trying to implement ADC multichannel scan (single sampling) with DMA on STM32L152 but there's a problem with conversions start. First SW conversion start takes the samples but following start com...

DMA from stack, why not?

Posted on August 20, 2013 at 20:03Hello, I was writting a driver for SPI transfer using double DMA ... to test it I wrote a few lines of code that prepared a buffer (locally), and sent it over SPI. The result was the first 4 bytes were ok then the d...

root by Associate II
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STM32 DMA and ADC

Posted on August 20, 2013 at 11:41STM32 DMA and ADCQuestions about the STM32 DMA and ADC: I now have the following requirements: The sampling signal list: A1 A2 B1 B2 B3 B4 B5 Suppose I cycle of PWM carrier for 5 KHZ. I hope B1 ~ B5 signal acquisiti...

avwa by Associate
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STM32F407 - 2 RAM banks

Posted on June 11, 2013 at 23:11I have a stupid question: F407 has 2 RAM banks - 128K with DMA access, and 64K no DMA access. 1) I saw that in all examples only the 1st bank used. 2) I saw that in all IAP Firmware Upgrade exampler, bootloader search...

alexandr by Associate II
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