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Timer Capture for frequencies < 100Hz

Posted on February 03, 2015 at 02:20Hello, I am endeavoring (as with every hair-pulling experience with the STM32F4) to measure/capture LOW frequency pulses. For this, I'm assuming I need to use a 32 bit timer: TIM2 or TIM5. This is a bit of a dilem...

STM32CubeMX 4.6 - STM32F373 GPIO_EXTI issue?

Posted on January 26, 2015 at 10:56 Hi all, I'm trying to activate GPIO_EXT line with interrupt. But when I set some pins with this configuration by tool, no NVIC Interrupt are ''created'' for this functions. I need add manual code instm32...

enrico2 by • Associate
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STM32 USB doesn't work compilation with GCC

Posted on February 02, 2015 at 00:12 I'm testing ST's USB Virtual COM Port example code(fromSTM32_USB-FS-Device_Lib_V4.0.0) on STM32F103ZET6 board，and the binary that is produced could not enumetate when compiling with gcc(-O0 or -O2 or -O3)....

obit by • Associate
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UART Question

Posted on September 03, 2014 at 18:42Hello everyone, I was wondering how to turn of the UART Interrupt, I am using HAL_UART_Receive_IT to receive incoming characters on the serial port.  periodically I want to take over the port and control it manua...

STM32F4 TIM causing FLASH PGPERR

Posted on January 30, 2015 at 13:09 Hey Everyone, I'm using an STM32F405 on a custom board with the STM32CubeF4 library. Whenever I enable the TIM4 peripheral, the TIM4->DMAR register automatically changes from 0 to 1. This is causing th...

Why Does Timer Pin Stay High After Disable?

Posted on January 30, 2015 at 00:19I'm setting up a PWM1 timer output on PC6. It configures and operates OK. However, at the end of the duration I run it for, I disable it, either by direct register, or the function call: TIM_Cmd(TIM3, DISABLE);   ...

Minimal Pulse width for triggering an EXT-Interupt

Posted on February 02, 2015 at 18:28Hello to all, I am using an STM32F2xx with 120Mhz. An external interupt is triggered with a rising edge of a GPIO-Pin. I looked in the datasheet, but I could not find information about the minimum pulse width at t...

andywild2 by • Associate III
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