STM32 MCUs Products

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Forum Posts

CubeMX Code Generation Issue for STM32L1 Parts

Posted on April 11, 2016 at 22:31CubeMX thinks there is a ''FW.L1.1.1.5.0'' update for the STM32L1 parts.However, it cannot download the update (''Not yet available'').When I download manually from the website, it seems like the cube software is onl...

dpryan by Associate II
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Forum issues - Attaching in-line images

Posted on April 06, 2016 at 15:47Something was changed in the last couple of days. It comes up with an XML pane, and a pop-up complaining. ''Web.config registration missing!  The Telerik dialogs require a HttpHandler registration in the web.config f...

What happens if reset occurs during FLASH page erase?

Posted on April 12, 2016 at 21:15Hi.First, I would like to ask about page erase time. As stated in RM (for STM32F303) it should last min. 20 ms to max. 40 ms. But I checked it with ETM profiler and the whole process of erase took only around 100 us....

matic by Associate III
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STM32L476 ADC trigger on SAI MCLK

Posted on April 12, 2016 at 21:40Is it possible to connect the SAI MCLK signal such that it can be used as a clock into a timer which is counted down to provide an ADC trigger - or are there aliasing issues with the timer? I want an internal ADC to ...

brians by Associate II
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Stm32F7: When is it usefull to enable DCACHE?

Posted on April 12, 2016 at 17:44In my understanding, DTCM, SRAM1 and SRAM2 all offer single cycle access. This leads my to the conclusion, that enabling DCACHE in a situation where there is no slow external memory does not bring any advantage, but ...

Question related to DSI resolution

Posted on April 12, 2016 at 16:49Hello! I am learning how to work with DSI interface on stm32f769 controller. There is one question. Dsi host gets the frame from LTDC interface, the maximum resolution of LTDC is 1024*768, but the maximum resolution ...

TIM5 on STM32F107VC?

Posted on April 12, 2016 at 14:17Folks, I am writing some software on the STM32F107VC, but in the header files there is no trace of TIM5, its interrupt vector etc. From what I can see from the datasheet this time should be on the processor. Am I mis...

DiBosco by Senior II
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