Bad GPIO_BRR_BRx definitions in V2.6.0 STM32Cube_FW_F4_V1.14.0 headers
Posted on February 24, 2017 at 13:28Hello,as L1/F2/F7, Stm32F4 has no explicit Gpio Bit Reset register. To reset a Gpio bit , the bit in the uppper halfword of BSRR has to be set.In some recent Cube update, definition like#define GPIO_BRR_BR0_Pos (0...