Posted on January 31, 2017 at 23:25I want to synchronize micros that each have their own clock. Is that possible? I was thinking of having a Master control the synchronization with GPIO. Essentially, when the pin is high (or low), you start whatever...
Posted on January 31, 2017 at 21:39In the code excerpt below there appears to be contradictory settings for nvic. NVIC_IRQChannel on the lines commented// First selection ************************** // Second selection **************************In b...
Posted on January 31, 2017 at 17:00Hi,I'm having no problem using the DMA in basic functionality, but I've run into something I can't figure out by my self.I'm having a STM32F207 processor and try to use SPI2 at the same time as UART4.the TX interr...
Posted on January 31, 2017 at 18:19I am using an STM32 F437 processor and the broken code I inherited uses the DMA to handle traffic from UART8. I am still grasping at straws a bit trying to find the best sources of information. So I am hoping someo...
Posted on January 31, 2017 at 17:206.3.13 RCC AHB1 peripheral clock enable in low power mode register (RCC_AHB1LPENR) Address offset: 0x50 Reset value: 0x0061 900F(gdb) p /x RCC->AHB1LPENR$6 = 0x61909fThe RM0383 misses GPIOe/H
Posted on January 31, 2017 at 16:57Hello,page 153 tells:8.4.1 GPIO port mode register (GPIOx_MODER) (x = A..E and H) Address offset: 0x00 Reset values: · 0x0C00 0000 for port AThis does not make sense and a look at a real device after reset gives:(...
Posted on January 31, 2017 at 15:56Hi All,I'm working with a board with two STM32F7 processors and trying to connector to the built in bootloader on one from the other via USART. The TX/RX lines are connected to the target on USART3 and on the maste...
Posted on January 31, 2017 at 15:52Hello!I have a basic question about the association between WKUP and EXTI signals in a STM32. I am using a STM32L467.My system has a push button that I want to use to wake the mcu from the STANDBY power mode. I als...
Posted on January 31, 2017 at 16:06I have an Active Low signal for break. But the Interrupt seems to be Active High Level sensitive.Doesn't the interrupt TIM1_BRK_IRQHandler respect TIM_BDTR_BKP (polarity)?Chip: STM32F103
Posted on January 31, 2017 at 13:49Hello,while DocID027813 Rev 4 chapter 5.4.2 knows aboit EWUP1..3, e.g.* @file stm32f412zx.h * @author MCD Application Team * @version V2.6.0only knows EWUP.EWUPx should be added in other headers too, where applicab...
