Bootloader modes for the STM32F7[2|3]x
Posted on March 15, 2017 at 11:56Hello,AN2606 does not yet know about the STM32F7[2|3]x devices.Regards
Posted on March 15, 2017 at 11:56Hello,AN2606 does not yet know about the STM32F7[2|3]x devices.Regards
Posted on March 16, 2017 at 10:48Good morning, I'm making a program that should receive from the UART a variable length message. The message ends with '\n'I tried it with thisuint8_t rxChar=0;int main() { HAL_UART_Receive_IT(&huart2, &rxChar, 1...
Posted on March 24, 2017 at 11:43I am working in STM32F407 Discovery board. I need to compress the text file and Send to the Uart terminal.
Posted on March 20, 2017 at 15:53Hi,In my application I'm using the Independent watchdog on a STM32F407 with a maximum reload period of 2 ms. During some maintenance operations, we need to save some configuration parameters in flash memory. Even if ...
Posted on March 24, 2017 at 02:08Are we getting close to the official announcement? I recall reading that the L452's were supposed to be in the distribution channel this month. Is that still the plan? I see the part numbers are already there at a...
Posted on March 24, 2017 at 08:10Hello everyone,I am currently working on an embb3ed GUI project using the STM32F405 with 192kB SRAM. Currently, we are in the phase of developing the electronic board. Is it possible to utilize the internal ram for g...
Posted on March 12, 2017 at 15:15I'm Japanese student, so I'm poor english.How do I learn STM32 programing? I want to learn how to use ADC, PWM, Interrupt handling etc. Is there document or Video/Web seminar for novice? I want documents and video th...
Posted on March 24, 2017 at 05:23How to set the bit12 of user option byte? The user option bytes memory is different from the Flash memory. I tried to set the bit12 (nboot1 ) with ST-Link utility and end up with error – attached screen shot for your...
Posted on March 13, 2017 at 00:37This is supposed to receive one byte in SPI bidirectional mode ([STM32Cube_FW_L4_V1.5.0]\Drivers\BSP\STM32L476G-Discovery\stm32l476g_discovery.c):&sharpif defined(__ICCARM__)&sharppragma optimize=none&sharpendif/** *...
Posted on February 07, 2017 at 17:45When an SPI in SLAVE is clocked continuously (with NSS active) and DR is *not* written upon every TXE set, there are several possible scenarios for MOSI behaviour after the last explicitly written data bit is tran...