STM32L4 DMA latency for ADC to SRAM transfer
Posted on April 07, 2017 at 10:27Hello everybody,I have the following situation: Processor STM32L47648MHz HSEI want to sample an external signal at 4MSPS. Therefore I use 60MHz PLLSAI1 as ADC1's clockThis gives 4MSPS (with 2.5cycles sampling and 12...