Posted on October 24, 2017 at 01:12Hello everybody,I am new here and i'm just using a STM32F411RE, as a hobby today, but I have encountered a problem with compilation of my binary file. It is just not working and I am trying to figure it out for man...
Posted on October 23, 2017 at 21:37Excited getting the STM32L476 Nucleo-64 board from the ST event last week. Was trying to program it past few days. Tried some examples from mbed with IDW01M1 WiFi module. But it was iffy, at times program just hang...
Posted on October 20, 2017 at 22:51Hi I am using STM32L431xx Timer3 and CC3 (compare mode ) on channel 3 and i want to trigger (ADC1 channel 1) and (DMA 1 and channel 1 ) to do collection of samples triggered on the timer edge. The timer works p...
Posted on October 23, 2017 at 13:47I'm not able to turn high PA15 output.All other pins (PB2, PB3 etc) correctly changes output with GPIO_SetBits/ResetBits.I'm using Keil and SWD connected programmer.I've checked with oscillator output but it's all ...
Posted on October 14, 2017 at 21:43Dear ,Currently I use a STM32F439. I have a demand to increase the speed of I2C above 400kHz. Is this possible? If not is there a STM32F/L4 controller that is pin-2-pin compatible that can be used instead?Regards,R...
Posted on October 20, 2017 at 18:51Hi, I'm attempting to make a usb audio device using an stm32f042. I have managed to prototype the same basic concept using an F4 discovery, but the same code (with some changes and new CubeMX autogenerated parts) f...
Posted on October 22, 2017 at 11:18Hello,I have a project with an STM32F446, with RTX, 3 threads (main + 2 declared by me) + of course the idle one. The main thread enters wait state after starting the two threads so i have just two threads running....
Posted on October 23, 2017 at 05:58Hi.Now I'm trying to implement the ADC on the STM32F103C8.but I came across some problem when I voltage leveling test.The code is here x = getPot()*3.3/4095; //get analog value and convert to volts, 12bit ADC if(x...
Posted on October 11, 2017 at 21:31 Thank you for your response.So far this solvesthe issue. I will highjack this thread to ask additional questions. Ido not know if this is also connected with 1.9.0 or it is a known issue (samePLLSAI1 clk ...
Posted on October 23, 2017 at 10:16Hello to every one,could anyone clarify something about the capacity of every FIFO stage description?At datasheet main features, in reception part, there is a:'Two receive FIFO with 3 stages'Which is the capacity o...
