Posted on June 20, 2017 at 12:58Using STM32CubeMX (use V4.21.0) one can 'Generate Code' for e.g. the IAR EWARM toolchain.If creating a new project in EWARM standalone, then EWARM creates two Projects Debug and Release.Any way to tell STM32CubeMX to ...
Posted on January 22, 2018 at 07:48hi,I am using SMT32F103VE, try to use TM1_CH1 ouput PWM at GPIOA_8, it can output correctly in debug mode with J-link, but can't output in normal mode(Power up after flash).The below is code. TIM_TimeBaseInitTypeDe...
Posted on May 30, 2017 at 01:36The latest version of CubeMX (4.21) with F4 Libs (v1.16) using the SDIO controller seems to have broken FatFS support. ff.c needs a file that declares the character sets being used because it contains a couple of util...
Posted on January 26, 2018 at 14:52Hi Is there a stm32 nucleo / eval /discovery board with lin and a LIN protocol demo /example project?
Posted on January 26, 2018 at 06:47I am interfacing sim 908 module with stm32f407VG discovery board. I programmed using CubeMx . Using AT commands I am able to transmit message to my phone via gsm module. The problem is I am not able to receive the ...
Posted on January 26, 2018 at 11:04 I am currently trying to get spi communication up and running between a stm32l-discovery board (uses STM32L152RCT6 mcu) and a nRF24L01( http://www.kynix.com/Detail/114168/NRF24Lhtml) module. I have the module...
Posted on January 26, 2018 at 08:42Want to use STM32 ST-LINK Utility for first hardware tests of prototypes with STM32F071 MCUs. E.g. switch LED on/off, set port pins, set dac values, read temp sensor of MCU and...and...As we want to use ST-LINK Uti...
Posted on January 24, 2018 at 06:21So, the 4.24 version won't generate anything if it does not have an internet connection. Even if there is firmware in repository...Now I'm loving the earlier version with a passion!
Posted on January 22, 2018 at 19:55I am trying to interface SPI3 of STM32F4with external SPI F-RAm memory chip. But after writing dummy data(0x00) in data register, data register is set to 0xff and it doest not change and my TXE bit is always set. H...
Posted on January 18, 2018 at 00:18Some PLL/PLLI2S/PLLSAI outputs (namely R and Q) allow odd dividers, which results in assymetric clock waveform (the extreme is divider=3, with duty cycle 2:1). The Q output of PLLI2S and PLLSAI further goes through...
