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Mapping SPI SDRAM

Posted on February 19, 2018 at 23:23Hello,I am using STM32L452 device. Is it possible to map an external SPI (not QSPI) SRAM memory as internal MCU memory before compiling using the linker? I was thinking about such memory: http://www.microchip.com/...

Resolved! STM32F051 TIM2 counting way too fast?

Posted on February 20, 2018 at 10:27I'm trying to use TIM2 on the STM32F0-Discovery board (I am new to the STM32, but have used the STM8 before).I setup TIM2 and USART1, then in a loop I send the value of TIM2_CNT via the USART1, so I can see how TI...

External Interrupt Issue

Posted on February 19, 2018 at 13:20We are using stm32f051r4t6 for a new project and the IDE is Keil V5 . We are generating an external interrupt on Pin PC2 . The hardware set up is a push button in  pull down arrangement whose interrupt should occu...

Resolved! Understanding FMC/SDRAM Clock Timings

Posted on February 18, 2018 at 19:46Hi, I've been dissecting the FMC_SDRAM example that comes with the STM32CubeF4 package.  I'm using the STM32F429 Discovery board.  The SDRAM chip it has on it is an ISSI IS42S16400J-7TL.One thing I don't understan...

Resolved! Smallest processor ?

Posted on February 20, 2018 at 01:12Does ST have a processor in a SOT23 package ?  5 or 6pin would be great.what is the smallest processor physically available ?

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STM32F7 dual boot question

Posted on September 28, 2017 at 18:58I am using STM32F767 and I can't understand the dual boot behavior of the board. I read AN2606. and for Fig 46. the flow chart of Dual Bank Boot implementation:When nDBANK = 0 && nDBOOT = 0, it should boot either...

Vector Table Relocation

Posted on December 11, 2017 at 20:04To make the firmware (flash offset 0x20000) start properly when branched into from my Bootloader (flash offset 0x0), I had to make the following changes to the system_stm32f4xx.c file and define a project symbol '...

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