Is SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE (HIZ) also set by the LSB of the RCC_APB2ENR register being set?
In the STM32l476, I have found that the VREFBUF_CSRregister 'HIZ' bit is being set from default 0 to 1 when SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) is executed. RCC_APB2ENR_SYSCFGEN is the LSB.