STM32 MCUs Products

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Resolved! STM32L4 ISR source

Posted on May 07, 2018 at 18:26Hi,Is there any doc mention about STM32L4 (STM32L4996 and STM32L4A6) ISR source? The doc I found from both ST and ARM reference manual do seems list all of the ISR source.Thanks,****Note: this post was migrated and con...

PCROP Confusion

Posted on May 09, 2018 at 00:54I understand that there have been many threads about PCROP here. I am trying to understand the logic behind having to build code using mpure-code on gcc or the equivalent on other compilers that allows the avoidance of...

kirem by Associate II
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MPU regions and DMA

Posted on May 08, 2018 at 23:43I am confused over the inability to successfully setup an MPU region for the area that the DMA is using.  I am trying to get around having to use Clean and Invalidate Cache like so to guaranty the data is passed correc...

How use to nandflash on usbdevice?

Posted on May 08, 2018 at 21:03I use STM32F429IG, MT29F4G08ABADAWP that have been tested nandflash alright.I want nandflash as usb device on WINDOWS10.So, I setting USB_DEVICE and mass Storage Class and use example 'STM32_USB-FS-Device_Lib_V4.1.0'.F...

Kwon YM by Associate
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Resolved! STM32F217 Revision 2 Bootloader

Posted on May 08, 2018 at 20:36Hi,I have a STM3221G-EVAL board with the STM32F217IGH6 and am trying to program over CAN. I checked the revision code on the chip to see what version bootloader it has and found it was a revision '2' chip. I can't find...

DMA from internal SRAM to FMC missing first byte

Posted on April 30, 2018 at 03:07 I'm using a Nucleo -F722ZE to interface with an FPGA. The instruction and data cache are disabled. I have timer interrupts to set off the DMA at specific times with 128 bytes per transfer. No matter how I set up th...

Resolved! stm32f407 i2s interface sync in slave mode

Posted on July 17, 2015 at 10:58Hello, I'd like to know if there is a 'magical' way to syncronize the bit stream with the channel signal in the i2s receivers. I don't have control on the external stream ( slave mode), so the serial clock is free run...

albert2 by Associate II
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Stop mode and clock configuration at wake up

Posted on December 28, 2017 at 07:42Hello,I'm facing an issue i cannot figure out. I'm currently working on a stm32l073 and using the following RTOS : RIOT-OS. When i wake up from stop mode, UART seems to be desynchronized because wrong characters a...