Posted on May 07, 2018 at 23:46Hello!MCU: STM32F103REwhen i reset Read Out Protection from my bootloader (from bootloder sub-programm from RAM) i have a erased internal flash. Set ROP to 1 -> 0. All ok! But.. how i can back data write to first 4k?? ...
Posted on May 09, 2018 at 10:21 Hi ! I have 2 binary files for 2 different function, I'm wondering if there is a stm32 embedded software who can help me to choose which binary run, through the UART ? I want to select the application I run andchan...
Posted on May 16, 2018 at 08:04Hi,I am exploring X-NUCLEO_IDB05A1 with STM32L476RG Nucleo, And while building the Profile_central project, I am getting build errors in console. Errors like:arm-none-eabi-gcc: error: ..\..\..\..\..\..\..\..\Middleware...
Posted on May 14, 2018 at 15:29Hi, I just updated the firmware on the LINK tool as the utility app said the firmware on the cable was an old version. Following the instruction appeared on the screen, I updated the firmware using the option from the ...
Posted on June 23, 2017 at 00:43Hello,I am having more or less the same kind of problems than the one in this post <LINK NO LONGER ACTIVE> I am trying a very simple program: a read IO block directly connected to a IO Write block. I started with Matl...
Posted on May 16, 2018 at 04:22Hello,I have modified STM32F303 discovery demonstration code to use I2C interrupts instead of polling mode.For some reason, I am not getting any interrupts. Can someone check my code? I added a function call to enable ...
Posted on May 14, 2018 at 00:10I have a relatively complex FreeRTOS application running. I need to see run time information more detailed than the 'by task' that I've gotten working. It's on a Nucleo 64 board, Atollic TS latest.From what I've read...
Posted on February 25, 2018 at 07:35The currently posted document does not address the Z-step part, see pg 1899This document is from Nov 2017, the A and Z steps are discussed in the Oct 2016 errata, along with a reference to RM0410 for details.http:...
Posted on May 09, 2018 at 14:49Try to send 16 bytes via USART1.ISR has reset value (0xnnnn n0C0) before sending first byte. Write bytes into TDR like this: USART1->TDR = *bufptr++;ISR bits TXE and TC get cleared as expected (0xnnnn n000) after first...
Posted on May 15, 2018 at 23:32Is there a good example or apnote on the proper use of sleep on exit from an IRQ?Do I need the Data Synchronization Barrier instruction? (to ensure sleep)here is some pseudo code, this does appear to work fine. I can ...
