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Thanks for the nice possibility for "PWM input mode" measurement / frequency measurement - works very perfect on TI1 or TI2.But the register descriptions for SMCR and CCER are somehow contradictory in RM (e. g. 37.4.3 and 37.4.9 ... but concerns also...
hi i'm reviewing rm0008 ref manual for stm32f103 the adc.accordingly, adc clock max is 14mhz and it takes 14 adc clock cycles for 1 conversion - hence 1msps per ADC.however, from the RCC section the available prescalers are 2, 4, 6, 8and if we take 7...
Hi, I have a problem with HardFault_Handler.Sometimes, when I'm writing into the flash it happens.After many days on searching still I don't understand why it happens and what it means.Has someone got a suggestiom for me?
Posted on September 16, 2012 at 20:51Hi All;For people who interested by connecting a mouse or a keyboard to the STM32F4 Discovery:Attached a project that I have ported from the example provided in ''USB On-The-Go host and device library'' that work...
Dear AllCubeMX (Clive, I know you do not encourage relying on it, but please bear with me for a while) adds many c and h files to a project. Is the programmer allowed to modify any of such c files other than the main.c? For example, I see a void SyST...
According to ARM Cortex-A Series Programmer’s Guide for ARMv8-A:15.1.2. Standby...This mode is entered using either the WFI (Wait For Interrupt) or WFE (Wait For Event) instructions. ARM recommends the use of a Data Synchronization Barrier (DSB) ins...
We are using ROS Serial to let Raspberry Pi and STM32F103C8T6 communicate with each other. And there is another UART channel for IMU to use. We observe that the spinOnce function of ROS jammed the process of MCU. Therefore, other work cannot operate ...
With a 400MHz clock and very high speed ports, I was assuming the faster data lines would need series resistors to avoid reflections in the way things like FPGAs do. But I've just noticed the evaluation board doesn't have any and routes even high spe...
Microcontroller used : STM32F779NIQuestion: [1] My understanding is that the backup domain is directly supplied from Vdd or Vbat (When Vdd is removed) without any regulation (1.8V to 3.6V). Does this means below blocks can operate directly using Vdd...
Posted on August 19, 2009 at 06:01SPI DMA with CRC Question
