What is primary risk for STM32F427 ADC if VDDA-VREF+ exceeds 1.2V max recommended operating difference by 300mv. Our system VDD=3.3V, VDDA=3.3V, VREF+=1.8V, Accuracy lost? IC damage?
DocID024030 Rev 9 states:4. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V.Normally, I would just make changes to satisfy, but a change at present product development stage is very costly. Using LQFP144 pkg if ...