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STM32H7 RevV Flash Programming and AN5312, where is the difference?

Uwe Bonnes
Principal III

RM0433 Rev 5 writes:

The recommended single write sequence in bank 1/2 is the following:

1. Unlock the FLASH_CR1/2 register, as described in Section 3.5.1: FLASH configuration

   protection (only if register is not already unlocked).

2. Enable write operations by setting the PG1/2 bit in the FLASH_CR1/2 register.

3. Check the protection of the targeted memory area.

4. Write one Flash-word corresponding to 32-byte data starting at a 32-byte aligned

   address.

5. Check that QW1 (respectively QW2) has been raised and wait until it is reset to 0.

An5312 Rev 1 writes:

The recommended write sequence is updated as follows:

1. unlock the FLASH_CR1/2 register (only if register is not already unlocked)

2. enable write operations by setting the PG1/2 bits in the FLASH_CR1/2 registers

3. check the protection of the targeted memory areas

4. write one Flash memory word (corresponding to 32-byte) data starting at a 32-byte

   aligned address

5. check that QW1/QW2 (respectively for FLASH_CR1/2) has been set high and wait until

   it is reset to 0.

I have read multiple times and beside wording, where is the difference?

1 REPLY 1
Imen.D
ST Employee

Hello,

In fact, the change was anticipated and implemented in the RM.

Regards,

Imen

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Thanks
Imen