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Hi, let me clarify more my situation ... I am coding this from scratch i am using a CAN transciever...My problem is that the CAN_Start function always returns an Error and while debugging i noticed that my code is stuck in the CAN initialisation what...
I have debugged the whole code to send data from stm32h750b-dk between the two fdcan terminals fdcan1 and fdcan2 the data is appearing on live expressions of txdata1 but in rxdata only 1 bit is being transferred can somebody mention what the problem ...
Hi, I am curious about one thig. I am using STM32F070CBT microcontroller which has LQFP48 package. My curiosity is about 3rd and 4th pins. In datasheet these pins additional functions are OSC32_IN and OSC32_OUT respectively. In my project, i did not...
Hello to all,We are trying to take over the JPEG_EncodingFromFLASH_DMA example from ST running on the STM32F769I_EVAL board.The original ST software runs fine on the board.However all the ram data is linked starting from 0x20000000, which is the tigh...
Hi. I have a problem with can filers on a G4 board. With standard ids device worked well, but when i changed id to extended the filters stopped working. // 5. FDCAN Filters configuration // 5.1. Dual filter for broadcast messages sFilterConfig.IdType...
Dear, We are working on a custom design which has PDR_ON pin floating. The board is already fabricated and assembled. The part number is STM32H7A3AII6Q. Please let us know if this has any consequences on normal operation of the MCU and if so...
Hi All,I am working on " STM32F103xE" controller. I am using internal RTC for the application. I am using internal RTC's backup register to store some Checksum value that can be used by application. We have connected the Vbat supply also to keep the ...
HiI'm using nucleo_u575zi board. Connected three external switches to PB0, PB1 & PB2 pins.By default, the pins are low, the pins are configured as: /*Configure GPIO pins : EXT_PIN3_Pin EXT_PIN1_Pin EXT_PIN2_Pin */ GPIO_InitStruct.Pin = EXT_PIN3...
Hi,My problem: how to configure DAC so that CPU core clock and DAC kernel clock can be asynchronous (i.e: 250MHz and 70MHz)?Details:- my hardware is based on the STM32H523CET6- configuration: - SYSCLK (HCLK) running at 250MHz (with PLL1 from HSE=TCX...
Hi to All I would like to try a configuration for GPDMA1 for STM32H503CBU6 using memory to memory. I will would like to use a Link-Lists. Source will be two different array of DATA Bytes inside the Flash Memory and Destination will be the GPIOB. It w...
