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The Project was migrated from STM32L4 to STM32L5. The Baudrate setting with HAL_UART_Init() works fine with L4 MCU. With L5 MCU it returns with an HAL_UART_ERROR_NONE too.
The doc and SVD file don't have a reg at offset 0x44 (GTZC_TZSC_MPCWM3BNSR).Since GTZC_TZSC_MPCWM3ANSR @0x40 exists, via symmetry I would expect B also at 0x44.The doc does say this:GTZC_TZSC external memory x non-secure watermark register 1(GTZC_TZS...
The STM32 have a 3-digit date-code timestamp, in YWW format, with single-digit for year.Given the rolling 10-year longevity commitment, this may be not adequate to uniquely identify the manufacturing year, e.g. in light of ES0204 Rev 10 2.3.8 (The d...
In the general operating section, it is described as "Input voltage on RST and FT pins".Do you consider the maximum rating of the RST pin to be the same as the FT pin?
Sorry this is a very simple question but somehow LED LD2 just won't work on STM32h745ZI-Q nucleo 144 boards. As per the manual "UM2408 STM32H7 Nucleo-144 boards", the LD2 is connected to PE1 (by the way, I tried PB7 as well as the older one may on th...
Hello,Since two year, I am experiencing an issue with the ADC_CHANNEL_12 (pin PC12) of my STM32F767. I suspect it's a hardware issue coming from the MCU. a stable offset is added (randomly change each time I reboot the STM)this read value (via DMA) i...
I saw this video. He say that in these ST boards, they have a trained model that can classify 8 faces.https://www.youtube.com/watch?v=Wzgfm5BH4qYWhat is the largest CNN network applied onto an STM32 board with CubeMX AI and how many objects could it ...
Hello,Currently, the generated binary file is 1 MB but with 96% of '0'.Obviously, it's quite long to transfer via CAN to update the firmware, mostly for 'nothing'.I can see that the 'end' of my code is: 1000 0000 0100 0000 4078 7d01 0000 0000Is it...
I would like to know what is the correct way to disable a timer’s ARR preload function using the HAL library ? And once that’s done, does the ARPE bit stay low for the whole runtime, or does it have to be cleared again regularly or after specific eve...
Hello,I try to activate fifo + burst in dma transaction, without success (goal is a DSHOT driver* for drone)My setup (stm32f767):memory to timer TIM3 in pwm mode, writing several CCR registers in timer using DPAR+DBA+DBL (DBA set to access CCR regist...
