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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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CAN Bus Mask and ID

Trying to understand how to setup the ID and Mask with Extended ID. I want allow messages with id's 0x1E02xxxx. So 0x1E021234 would be accepted and 0x1E031234 rejected.   /*##-2- Configure the CAN Filter ##########################################...

FJB2069 by Associate II
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Weird cache write-back behavior for STM32F7508

I am doing some characterization study for the cache behavior on STM32F7508. The result is hard to understand.Below is a simple code that I use. I align the array A1 to the cacheline (aligned(32)), and it is placed on SRAM1 above TCM (0x20010000~ ) w...

KMaen by Associate III
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change LPTIM_CNT on TIM4

Hi, is there a way to change LPTIM_CNT on TIM4 so that LPTIM_CNT = LPTIM_CMP, this is because for every interrupt we need the PWM to skip some period. is there any sample code ?

Wleon.1 by Associate II
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UART LIN DMA HAL

Hello, second day try to launch UART in LIN mode.Task: waiting break, when break flag set up, switch on DMA receiver.Transmitter works fine and send 100us break before frame.But receiver can't set UP Break Flag.And there are not everywhere examples =...

AMele.1 by Associate
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