STM32 MCUs Products

STM32G030J6 Reset in loop

Hi, I have a STM32G030J6 with a trimpot connected to PA0 (NRST), but I need to disable NRST function. Based on pdf (UM2568) I write this:<code>uint32_t nrstmode; /* Enable Flash access anyway */ __HAL_RCC_FLASH_CLK_ENABLE(); /* Unlock flash */ FLASH-...

STM32F405RG CAN1 TX interrupt works well, but RX0 and RX1 cannot be triigered.

When I use the STM32F405RG to send and receive CAN message, it can send message successfully and trigger the tx interrupt, but it cannot trigger the RX0 and RX1 interrupts, the code was generated with STM32CUBEIDE. The relative code is as follows:1 ....

ADC external trigger input

Hi I'm developing an application which I tested on the nucleo board and I want to make my custom board. I went through the datasheet of STM32Go71kb(32 pin version) and I could not find the ADC external trigger input pin. Additonally I cannot provide ...

STM32L011F3 ADC Calibration

Hi Sir,In STM32L0 ADC, there is a feature call ADC calibration.I would like to know, after performing ADC calibration, do I have to do factoring using the CALFACT (calibration factor obtained after running ADC calibration) in the result I obtained fr...

Hi Sir, I am using the STM32L011F3 on the Boot0 (PB9) pin as a key interrupt input pin. However, it doesn’t seem to respond to keypress to change state. Is there any special setting that need to perform to re-use Boot0 pin as GPIO pin?

External SDRAM performance vs data width (8, 16, or 32)

I'm adding external SDRAM to a project and I'm trying to decide which data bus width to choose, 8, 16, or 32 bits. Do the wider bus width options significantly affect external SDRAM performance? I have been poring over the AN4891 app note but it ...

CPU cycles spent (MOOC - MOOC - STM32F7 hands-on workshop)

Hello, I am following " MOOC - MOOC - STM32F7 hands-on workshop" from STM official YouTube channel . In workshop there is example code to measure number of clock cycle spent for piece of code with TIM_MEASURE_START and TIM_MEASURE_END. As there are...

Will the data of FIFO be flushed when multiple streams start simultaneously in the same DMA.

For example,One stream use FIFO and the other stream does not.What does FIFO behave like when two streams are started at the same time?