STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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STM32 F4 Timer Input capture

Dear community,I am trying to use a timer to see if there is no activity on a data line. However, it works not as expected. As you can see in the picture, the timer (yellow) gets interrupts when the signal line (pink) is changing. But no interrupt, w...

SSchu.4 by Associate II
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Resolved! Code doesn't execute after upload

I am using stm32G031K8 nucleo board. The board was working well, it started to reset itself continuously for some time, I could only see my uart message that says started, every time I erased the code and upload previously working versions. Then it s...

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kb24 by Senior
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Function use in stm32 Library

as you can see below , i am writing a function from stm32 libraryvoid I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)the question is, can i use it in main file likeI2C_SendData(I2C1,(uint8_t*)data_t);can i go from "uint8_t Data"" to ""(uint8_t*)data_t...

ALE1 by Associate II
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Cannot upload program to stm32f103

I ​have stm32f103. I have tested serial test program that prints hello word continuously without any delay. But after that when I I try to upload new program or erase, I cannot succeed in it. Please help me, what will be the problem how to rectify.I ...

Praveen1 by Associate II
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What are TIMx TIx[1..15] input signals?

TIM1 section figures 55 and 79 in G0 reference manual RM0454 Rev2 refer to TI2[1..15] as selectable sources for TI2 signal (see also TI2SEL register bits). It appears that TI2[0] is the TIM1_CH2 pin, but what are the sources for the TI2[1..15] signa...

GPope.1 by Associate
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STM32F745vg Hardfault handler.

sir,Am uisng STM32F745vg controller for stepper motor controlling through a driver.while running program am getting hard fault handler .can you provide why hardfault interrupt occure.what is the solution for hard fault handler.

steja by Associate II
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