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Having problem with UART communication in Interrupt mode

I am doing a project on STM32H747 DISCO Discovery board involving UART. I am sending one string continuoulsy with 5 seconds delay from esp32 to stm32. I am able to receive the string in polling mode but I am not able to receive the string in Interrup...

SLuit.1 by Associate III
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Weird PWM Timer3 master and PWM Timer1 slave behaviour

Hello, I have a timer 3 master and timer 1 slave. When a button is pressed, master is activated as long as button is pressed, and then slave is triggered based on master's output signal (high / low) (gated slave control)(This is a continuation of my...

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Xxoyo.1 by Associate III
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  • 4 replies
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STM32F746GDISCOVERY, PWR_PVD, STM32CubeIDE

I want to make an interrupt when power > 2.0V. STM32CubeIDE generated:/** * @brief NVIC Configuration. * @retval None */ static void MX_NVIC_Init(void) { /* PVD_IRQn interrupt configuration */ HAL_NVIC_SetPriority(PVD_IRQn, 8, 0); HAL_NVI...

Resolved! RTC inaccuracy induced by internal clock source?

I'm using the STM32L431xx mcu. The current hardware configuration of our design has no external clock source (crystal), so we are using the internal one. And there's a new functionality which demands second-accurate real time clock, over a period of...

I2C in DMA mode - deadlock on I2C interrupt

Has anyone have similiar issues ? I got I2C DMA writes working nicely on table, but in real application there are disturbances which cause false start condition on the bus.This happen when I2C HAL driver has "lock" on I2C handle - so incoming interr...

Forcing Capture-Compare-Register to clear [STM32H7]

I'm trying to count the number transition during the time another process is taking place. Don't need frequency, just the counts.So I've enabled TIM8CH3 for capture-compare, and have verified that CCR3 does change when there are transitions on th...

bnguy.1 by Associate III
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Interrupt mapping to NVIC ISR vector

I was looking at the ARM M7 reference manual, and it shows an empty NVIC ISR vector from 0x40 to 0x3fc. When I look at the file startup_stm32h725xx.s it defines specific interrupts mapped to the ISR vector. Are these hard mapped by the EXTI block an...

DCons.1 by Associate
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