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We have a PCB that is programmed via JTAG using the ST-Link/V2. Recently, I got some ST-Link Mini's, but I can't get them to talk to the same PCB the V2 does.

Looking at the pinouts for the 20-pin JTAG connector on the CBA being programmed, I see:1 - 3.3V2 - JTMS3 - GND4 - JTCK5 - GND6 - JTDO7 - n/c8 - JTDI9 - GND10 - /JTRST11-20 - Odd pins are GND, Even pins are n/cLooking at the STDC14 connector pinout f...

BRich.3 by Associate
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P-NUCLEO-LRWAN2 won't communicate with PC via USB

I've purchased an LRWAN2 kit for an upcoming ST workshop, and I wanted to make sure I can set the RF band, etc. when the time comes.I've followed the setup instructions in UM2587 rev 2, the "Getting Started" guide, and I get the following power and s...

SHers by Associate III
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stm32f412 i need much more clock speed!!

hello every one. im running something that needs high clock speed. actually i want to create picture with some moving LEDs. i have 75MHz on gpio but its not enough. i just know its possible. im using register codes. im using boolean array for image d...

Mesl.1 by Associate
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STM32L0+: The RTC-Wake-Up_timer with __WFE()-sleep-entry delivers two wake ups instead of one wake up. And this consumes more power then needed.

__WFI():  (Wake up by Interrupt):leads to a one wake up as expected but swallows some interrupts if more interrupt sources are simultaneously produce interrupts. The understanding of this behavior costed me a lot of time.       __WFE():  (Wake up by ...

FEber.1 by Associate II
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Resolved! Can I use disabling of certain low-power timer (LPTIMx) by clearing the ENABLE bit in the LPTIM_CRx register safely if no interrupts from LPTIMx are used to wake up MCU from Stop mode?

Clarification: Can I be sure that the case in Errata sheet ES0491 "Device may remain stuck in LPTIM interrupt when entering Stop mode" never occurs for certain LPTIMx if no interrupts within it are used to wake up MCU from Stop mode and disabling of ...

STM32G4 flash write/erase

I'm quite confused. The RM0440 states: "Note that read-while-write capability (or RWW) is only supported when the dual-bank architecture is active. This enables programming or erasing one bank while executing code from the other bank." Okay, for me, ...

BMcK by Associate III
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stm32L452 HAL_SD_WriteBlocks_DMA without irq response

It is the problem about the dma driver of stm32L452's sdmmc1.ide: cubeideboard: NUCLEO-L452REconfig: sdmmc1 with dma , sd 4bit, without rtossdmmc1 dma config : 1. {sdmmc1 both(rx and tx) : dma2_channel_4} or 2. {(sdmmc1_rx : dma2_channel_4) and (s...

Cchn.1 by Associate II
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