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Master is a STM32H757, slave is a LSM6DSO ( accelero + gyro ).I have a SPI link inbetween.The "int2" pin on the LSM6 rise up when data are readable in registers.This pin is connected on EXTI2 on STM32.Register read is auto incremental on LSM6.I need ...
Hello, is there a way to instruct the compiler to place a const value at a specific address in flash memory? On another toolchain I was able to useconst char array1[4] = {1,2,3,4} absolute 0x9D008000; // stored at flash address 0x9D008000If not, is...
I'm starting with STM32F767 and cannot understand the thing about connection of the ITCM to ART. What is recommended: enable ART and flash access over TCM, or just enable ICACHE like in H7, and access code over AXIM?When flash is accessed via TCM, do...
I'm trying to convert 'baremetal' code from the STM32F103 to the STM32G431. I've managed to sort out the GPIO and EXTI stuff, but the ADC is confusing! To start off, what registers on the G4 correspond to CR1 and CR2 on the F1 ADC?
Hello,I am trying to properly implement the standby mode entry routine on an STM32L0 MCU. I have this exemplary minimum working example that does not work as expected:/* USER CODE BEGIN 2 */ HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_SET)...
Hello,I am currently working with stm32H743 processor.I wanted to know if DMA access can trigger an ECC error or only the core can generate these errors.For example if there is a ram data protected by ECC with a double bit error, would a DMA access t...
In debug mode, I see the following on CM7: At the same time I see the following on CM4: How is this possible if I have turned cacheability off?MPU_Region_InitTypeDef MPU_InitStruct; /* Disable MPU */ HAL_MPU_Disable(); // Configure SRAM2 as non-c...
I am continuously calling HAL_UART_Receive_IT(), until i get some specified value in receiver buffer. But after some time HAL_UART_Receive_IT() return BUSY and after that it is not receiving any further interrupts and seems like the code is dead. H...
Hi, What are the revisions of the STM32F411CEU6 chip?The ERRATA doc from STM mentions only revision "A" . Are there other revisions?I received board with revision "1" .
