STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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STM32F105 unsigned division wrong result

Hello community,Processor : STM32F105 (Cortex M3)Compiler : GCC 6.3.1I would like to execute the following assembly instruction :udiv R3,R2,R3where :R2 = 64 000 000R3 = 1Instead of getting R3 = 64 000 000, I get R3 = 2047I tried to execute strictly t...

JPasc.2 by Associate II
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DFSDM DMA: Which CPAR register?

Hi - I'm having trouble getting DFSDM input to work with DMA - I'm unable to set the `DMAEN` bit in the DFSDM register.One troubleshooting angle: What register pointer to you pass to the DMA's CPAR? I assume `DFSDM_ FLTxRDATAR` for regular (non-injec...

DOCon.1 by Senior
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STM32F105 Multichannel DMA ADC Read Buffer Offset Error

MCU: STM32F105RCTxFirmware Version: STM32Cube FW_F1 V1.8.0I have DMA setup to read 8 channels of the ADC into a fixed buffer and I'm having an issue where after an extended period of time (usually hours) the ADC channels are read into the wrong buffe...

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Jon Enz by Associate III
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Resolved! DMA using USART3 on STM32H7 part

I am trying to get the USART3 to work with DMA, and so far have been unable to. After the initial cubeIDE project setup, I verified that standard (non DMA) RX and TX were working fine.Moving to DMA, I was getting Direct Mode Error interrupts, and a l...

dawime by Associate II
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Can QSPI flash store large program memory code?

 Hi,I am using STM32F746G_DISCO board to create different pages for the LCD. I see only one page with 4 tabs project already takes 300KByte flash memory code space. The STM32F746 only has 1MByte flash. So I like to store the LCD graph code related mo...

JChen.24 by Associate III
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Resolved! usart2 stm32g030k8 does not work correctly

Hello everybody!I can't use USART2 in STM32G030K8 to transfer data.The TC flag of the ISR register is not set after writing data to the TDR register for an infinite time, if I use it to control the transfer of a byte, the program hangs without transf...

Akoli.2 by Associate III
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The DMA buffer configured with a multichannel ADC setup ( Processor STM32f769II) shows values in different buffer location with respect to the rank configured in the ADC setup. How can this be fixed?

We have connected 7 channels in ADC2 to a STM32F769II processor. The DMA to ADC is enabled and the rank for conversion too is configured. But on testing, the ADC values are being shown in buffer location very different from its rank.This happened in ...

SP.7 by Associate
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