STM32 MCUs Products

Help with understanding pin layout for stm32f030f4p6.

Hello, we are college students from the University of Texas at Tyler and are looking for help in furthering our understanding the functions of each of the pins in a stm32f030f4p6 microcontroller. We intend to use this as the microcontroller to develo...

stm32g031 problem DMAMUX module

Good afternoon!I have a problem with the operation of the DMAMUX module with synchronization from EXTI on STM32G031.my task is as follows:1) start reading SPI data after receiving EXTI event.2) after SPI data reading is finished, start sending data v...

STM32 CAN-FD

Hello,I have no CAN experience, but I have to decide soon if we can use the STM32 (prob. H7) with its CAN-FD interface.To me with my limited CAN knowledge it looks like it supports all hardware necessities, like "old & slow" CAN and the newer, faster...

I am designing hardware using STM32H7. I would like to connect three power monitor devices to SPI4 of MCU as slave devices, but SPI4 has only one NSS(slave select) pin. How should I connect these multi slave devices to SPI4 of MCU?

STM32L412 LPUART with ST232

Hello,STM32L412 will be in stop mode 2 with LPUART. This device is a slave device, master device wakeup on time schedule and gather data from it by RS232.ST232 is powered by master device. But issue is that when ST232 power is off by master, then it ...

How to find out the type of FDCAN transceiver in H755 and H743 boards ? Is it the MCP2562FDT ?

I looked the datasheet and reference manual, not mentioned there.

The specified A/D datasheet performance shows a typical SNR of 69dB. Measurements on the EVM give values of 81.8 dB. Does this family of parts usually run that much better than datasheet values?

What is the thought of putting two processors in parallel sharing all but one pin. And only one is active at a time depending on the state of the one pin at reset?

I have a system that needs to run for years. But is in a place where it cannot be maintained. The desire is to have two processors, one running, and one in backup. The second can be powered down, or powered up, but in lowest power sleep mode. If a pr...

IRQ from SPI DMA Rx Complete before end (too early)

I use an SPI interface with Rx and Tx DMA to transfer a 22 byte buffer from a spi slave. Chip select is handeled withLL_GPIO_ResetOutputPin(TDK_nCS_Port, TDK_nCS_Pin);set to high again to end transfer I wanted to use:// SPI5 - IMU TDK Rxvoid DMA2_Str...