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Hello ST Community,I read in the follow post question about boot sequences for STM32:STM32H7 dual core: How to start with a busy-waitin... - STMicroelectronics CommunitySo, in the post above, I see that is explain the first three Boot order of the Ta...
I am using ADC + DMA + USART1 + Timer in STM32 IDE in a setup consisting of:Motor → Sensors → MCU (STM32N6) → PCI am capturing the signal received at the serial port using NanoEdge AI. I have shared screenshots of:The actual current waveform observed...
I am using STM32H563 and using seven pins to read data, all through ADC1 with GPDMA1 Channel0 -2 Words internal FIFO. I connected all seven pins to ground, expecting to get all zeros or values close to zero, but the readings seem to fluctuate randoml...
Heyho,the title says it...In RM0486, 14.6.5 PLL description, page 437 / 438 I find this:Using the PLLs in fractional modePLL off ... set FRAC ... PLL onCaution: Do not update DIVN and DIVNFRAC after the PLL has been enabled.On the other hand, there a...
Hello, I made a board with an STM32F103C8T6 which uses USB.My issue is that when conecting USB (self powered or with external power) I get the following error on windows:Windows has stopped this device because it has reported problems. (Code 43) A r...
Hi everyone, I'm looking for a way to be able to encrypt my flash on stm32g030. How do I do it? Thanks
Hi，Can the equivalent gate count for the STM32H750VB be provided for reliability research?Thanks
Hi,I selected STM32H7A3ZIT6Q to use external SDRAM. However, in STM32CubeIDE under Connectivity → FMC, the SDRAM option is not available.When I select STM32H7A3ZIT6 (non-Q), the SDRAM option appears.Does the STM32H7A3ZIT6Q support SDRAM, or is this a...
Hey guys,I am searching for RoHS/REACH records for STM32G431KBU3/STM32G431KBU6 but they're only accessible for one of the STM32G431 parts.Any of you have any pointers to how I may else obtain such documentation?
SYS CONFIG =========================================== IO Supplys = 3,3V, VCORE = 2,5V regulator used, FSystem = 200 MHz Timer1 is configured for Output Compare CH1, sig 0.1MHz 50% duty expected (all necessary clk enabled) Compare SIG is routed to PK...
