STM32CubeMX (MCUs)

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STM32CubeMX 6.12.0 released

We are pleased to announce you that the official release of STM32CubeMX V6.12.0 is available. What is new in STM32CubeMX V6.12.0?New MCUs/MPUs series : STM32WB0 ,STM32MP25XX and STM32C071XXAdd support new CPNs STM32G4: Add support STM32G4 'Z’ and STM...

Cube MX FreeRTOS Tasks vs Threads confusion

Cube MX seems to constantly confuse FreeRTOS Tasks and Threads.Term Tasks is being used where Threads are being actually configured.In FreeRTOS Tasks and Threads are two different beings.This is super confusing.

TDJ by Senior III
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STM32CubeMX, STM32F7 and CMSIS RTOS2 work flow?

I created project using ARM MDK (Keil) tool chain where I installed STM32 FW Pack and then using MX Cube to create main.c, stm32F7xx_it.h and stm32F7xx_it.c. I was not using any OS. Application is working ok. Now I am trying to add CMSIS - RTOS2 so I...

Importing a new .ioc in an existing project

We have a project that was working with a demo board with a different micro than our final project uses. We imported into CubeIDE an ioc generated by CubeMX by our hardware engineer. We did a bit of work on the project to include source from a vari...

AJone.5 by Associate II
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STM32G030F6 BOOT0 and SWCLK shared

HelloI have a bunch of STM32G030F6 and they are in TSSOP20 package.I used SWD and BOOT0 pins to program L433 and want to do the same on G030F6However, unlike same TSSOP20 package F070F6 has, G030F6 share BOOT0 pin with SWCLK.19th pin of STM32G030F6 i...

MKanc.1 by Associate III
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Resolved! What is the significance of SRAM Bank swapping?

Hello all,While configuring the FMC SRAM configurations for STM32H747 MCU I found the option for bank swapping.As I see the reference manual I understand that the chip select configured interchanges it's address with that of the SDRAM bank addresses....

Aarra.1 by Senior
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Resolved! CubeMX 6.5 bugs

Hi,I would like to report 2 bugs.I created a blank new project for STM32G030F6P6. When I try to enable USART1, it says "Unknown conflict". See the attached screenshot.For STM32L452RET6, when I set LSE drive level other than the default with LL driver...