STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
Hello,TN1236 explains the advantages of QFN packages with wettabls flanks? Do any QFN STM32 have these side wettable flanks?
I am using STM32U575ZI cortex- M33 controller. I am able to generate a code for the same micro controller in CUBE MX. But in Cube IDE I couldn't able to build the files. It shows some compiler error. like,"../Drivers/CMSIS/Include/cmsis_gcc.h: In fun...
Hello,I am using a STM32H753. I would like to test the ECC on the L1 cache. In my understanding, a double bit error on the data cache would trigger a BusFault: is there a way to produce it? Thank you
The USB Host seems to not work if WFI is executed in the FreeRTOS Idle task. Is it not possible to use USB with a WFI Core sleep?Thanks for any insight. A forum search yielded mention of similar problems on other devices (over years!) but no defini...
Hi, I would like to test the EMW3080 with the STM32H5, as I understand it is necessary to load the firmware provided by the ST in order for the EMW3080 to work with the driver provided for the B-U585I-IOT02A board. Correct?Does ST have plans to laun...
Hey, I am using NUCLEO-H743Z12 and I am trying to configure the ethernet peripheral (and LWIP) with the cubemx with no success (I red lot of manuals online).In the end, I cant even ping my board.Please anyone can help me with the configuration?I main...
I have an ADC connected to my MCU using I2S. MCU configured in I2S master receive mode. MCU supplying the ADC with 12MHZ MCLK. MCU sampling freq is 48 KHZ(Actual is 46.875 KHZ), Number of slots are 4, Data size is 16bits and I2S standard protocol. Us...
I try to figure out what the correct UCPD clock frequency is.RM0456 in section 74.4.2 UCPD reset and clocks states:"The receiver is designed to work in the clock frequency range from 6 to 18 MHz. However, the optimum performance is ensured in the ran...
STM32L4R9AII6 generates 16 SPI clock pulses when I have selected data size 8 in STM32CubeMX.When I measure the SPI clock when I write a single byte to the SPI1 DR register it outputs 16 clocks.When I debug I can look at the SPI1 registers. The CR2 DS...
