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Posted on June 05, 2017 at 08:451. We are considering a system with multiple STM32F429VI (100 pin). At that time, is it possible to connect multiple CPUs via FMC bus and flexibly access mutual FMC memory area? 2. How many nodes can the SPI multi-mas...
Posted on June 05, 2017 at 07:27Hi all!We're working on a board that uses the STM32F7 and we'd like to add external SRAM and NOR Flash. In both cases, we'd like to use Serial memory to save on IO pins, layout, etc.In looking at the schematics for th...
Posted on June 05, 2017 at 00:37I have implemented the IWDG on the STM32F4 and it works without problems. I have the DBG_IWDG_STOP bit in the DBGMCU_APB1_FZ set to avoid Watchdog Faults i.e. when debugging. Did I get it right that the watchdog in a...
Posted on June 03, 2017 at 16:02 Platform: STM32L4DISCO IDE: SW4STM32 Hi, I used CubeMx to configure the USART2 with the following parameter Baud rate: 115200Word lenght 8 bitsParity noneStop bits 1 I used Putty as the serial terminal wi...
Posted on June 04, 2017 at 04:37There doesn't seem to be any bit definition for the GPIO AFR registers. I can set the PA5 pin alternate function to AF1 using the below code but other registers seems to have bit definitions to use. Am I missing them?...
Posted on June 03, 2017 at 22:10I remember downloading schematic files from ST website for boards like STM32F429 Nucleao. I can't find schematic for any board now. Have they moved or taken off the website?#schematics
Posted on June 01, 2017 at 16:26Exacly how is BSP_LCD_DrawBitmap using data?I read the text above the function definition and did just as it said. I tried various=every options, but nothing worked. I used a software called Image2Lcd(.exe).Then someo...
Posted on June 03, 2017 at 08:20Hello,I fiddled around with an stm32l476 discovery board. Is there a way to reinstall the demo app originally installed on the device? Is there a place where I could find the source code?Kind regards,aannoBtw, the boa...
Posted on June 02, 2017 at 17:31Hi,I am implementing a routine to verify my programmed flash image on a byte-per-byte basis against a master file on a byte-by-byte basis. I'm having problem reading from the flash at certain memory addresses. When I ...
Posted on June 03, 2017 at 14:07hi,Is CPU halt when DMA access the bus for data transfer between peripheral and memory? if it is true then why in Application note AN4031 they have written''The DMA allows data transfers to take place in the backgrou...
