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STM32L431 COMP erratum

Posted on April 05, 2017 at 12:04On the STM32L431, there's an erratum described in STM32L431xx Errata sheet (STM32L431xx device limitations / DM00218224). It allows to reset COMP1 and COMP2 despite of the LOCK bit being set.My question: What happens...

STM32F411CEx RTC drift with LSI RC clock

Posted on April 05, 2017 at 16:20Hi,We are using STM32 internal RTC with 32.768 KHz LSI RC clock. We are observing very large drift in time(Approx 3min lag in 1 Hour).We have gone through the RTC calibration application note.But that requires manual...

Resolved! STM32F767 SRAM1 Address

Posted on April 05, 2017 at 12:42Looking at the STM32F767xx Datasheet (DocID029041 Rev 4), the SRAM1 address is listed as 0x20020000.But the STM32F76xxx Reference Manual (DocID028270 Rev 2) lists this as 0x20010000 in several places: Page 98/1896: ...

dohzer by Associate II
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Using SDIO for both USB Mass Storage Device and FATFS

Posted on April 05, 2017 at 13:43Hi,Over the past ~18 months we have made an stm32F405 based logging device. Data is gathered and stored to SD card, when USB is plugged in, the SD card is 'owned' by the Mass Storage Device implementation that we got...

henk23 by Associate II
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STM32CubeMX 4.7.0 FreeRTOS osMessageCreate bug

Posted on April 30, 2015 at 01:58osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id){  (void) thread_id;  return xQueueCreate(queue_def->queue_sz, queue_def->item_sz);  //return xQueueCreate(queue_def->queue_sz, (ui...

lqdjdy by Associate
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