Posted on December 08, 2017 at 16:47Hi! I'm new to stm32. I'm trying to use stm32f722RET6 with WM8510 audiocodec. In CubeMX only SPDIF TX can be selected for SAI1, (I2S/PCM is inactive) . Is it possible to use SAI2 as master receive (I2S protocol)...
Posted on December 08, 2017 at 02:01HI,I have a STM32F07G-Disc1 board attached to a Embest BB board which provides an RS232 Interface. I started the STM32CubeMX, and activated the USART6 in Asynchronous mode and Generated the Default code. The follo...
Posted on December 06, 2017 at 13:59I add some code to the files generated by CubeMX. When I regenerate the project, my added code will be deleted.In the main.c is /* USER CODE BEGIN */ and /* USER CODE END*/ but in other files, there is no area whe...
Posted on December 07, 2017 at 14:58I like to start a new project based on the STM32Nucleo pack for IoT node with Wi-Fi(STM32 Nucleo-64 development board with STM32F401RE MCU).I need to show some decimal values through a LCD keypad display. Here is ...
Posted on December 07, 2017 at 10:55NRST � I/O Reset - Device reset input/internal reset output(active low). How can I connect this to a HC-05 bluetooth module?#stspin32f0a #bluetooth #nrst-pin #hc-05
Posted on December 07, 2017 at 11:33I would like to make my MCU appear as a 256-byte I2C RAM on the I2C bus - then I can have the controlling device simply write to the 'RAM' in order to communicate.This requires variable length access ( e.g. 'writ...
Posted on December 08, 2017 at 12:04I am using the STM32F767ZI for FreeRTOS project. I am giving the different priorities to two different tasks but it does not give the effect in the output./* definition and creation of Task1 */osThreadDef(Task1, S...
Posted on December 08, 2017 at 12:03Which pins can I use to use the embedded motor driving circuit to run Brushed DC Motors?#stspin32f0a #motor #brush-dc-motor
Posted on December 07, 2017 at 16:56Hello,I have a problem with the STM32H743.I have a pluggable SPI connection and the STM32H743 works as a Slave in receive mode.When I pull and plug the connection the NSS, CLK and Data connections toggles and I ge...
Posted on November 08, 2017 at 10:11Hello,I have read several documents about the Cache, but the last sentence in AN4839 (Level 1 cache on SRM32F7 Series) confuses me.' However, If the external device is an ASIC and/or a FIFO, the user must disable ...
