STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
Posted on March 30, 2018 at 14:48 I'm testing one application with 3 differente device that send a message with random command ID and random data on CAN bus every random timeout: two devices with two STM32L433 nucleo and one with STM32F446 nucleo a...
Posted on April 06, 2018 at 15:05Hello,STeMwin version 540.FreeRTOS version 9.0.1.IAR EWARM 8.20.1STM32F746NG with 32MB of external RAM.I'm trying to use STemWin in a multi-task environment however I'm not getting very far. I had actually been usin...
Posted on April 06, 2018 at 10:21Hello,I use the Nucleo-L476RG to send and read data by the UART, so for that I used STM32CubeMx,the goal is to send data in a Maximum of baudrate which is 10Mb/s as shown on the picture below, but the code is excuted...
Posted on April 06, 2018 at 15:13Does anybody know where can we purchase the LCD that is used on the STM32L476G-DISCO (GH08172T-B)? Or a compatible one?
Posted on January 16, 2018 at 12:59In the context of previous sentence, this sounds like SAIXEN would have no meaning in SPDIF mode.I'd reformulate the latter sentence as ''AFSDET has no meaning in SPDIF mode...''JW
Posted on January 03, 2018 at 17:07Is it a typo or is there some Interrupt mask register 1?JW
Posted on April 06, 2018 at 16:02Hi everyone,I'm trying to create my own blocking I2C driver and want to split the usage up into a few primitive functions, e.g. for I2C Master Transmitter, the following functions apply:bool i2c_start_write(uint8_t s...
Posted on February 27, 2017 at 17:11RM0410, rev.2 defines 0xF0FFAAFD as default value for FLASH_OPTCR. Table 3.7.8 has a value of 0xFFFFAAFD. This value does make more sense.Please correct, if not yet already done.
Posted on April 06, 2018 at 10:19Hello,I am a Masters student in Embedded Systems at KTH working on a thesis to develop a blasting monitoring sensor and wanted to hear your suggestions on uCs.My intent is to measure ground vibrations with 3 geophone...
Posted on April 06, 2018 at 11:20Hello,I use stcube for pin allocation. At the moment I have a project with the STM32F303VD. The recent errata sheet clearly says: '2.1.3 Full JTAG configuration without NJTRST pin cannot be used .' However stcube off...