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Can anyone please provide me document of the STM32F429IZT board full pin details and features and everything about the board.
I'm trying to get TIM4_TOGO output to start conversions on ADC3 on a STM32F7 DISCOVERY board.I've attached main.c. I use a GPIO output toggle with oscilloscope to detect code execution and timing. I can see the toggle from the TIM interrupt handler, ...
I have been using CooCox successfully for my STM32F103C8. Now I want to port my project to a STM32F105RC but I have not been successful since the startup_stm32f10x_md.c is for the mainstream processors and not for the connectivity line. Even some hit...
I am using NUCLEO-L4R5ZI.I already know about datasheet and application note.I generated code using by CubeMX. And I use peripheral LPUART and OCTOSPI.Nucleo board is connected to FPGA board.FPGA board don`t have flash memory(micron or macronix). But...
Hello,In stm32h7 I find examples/FLASH/WriteProtection example in EVAL folder, but the same example is missing from Nucleo folder.The protection is for the user flash (internal flash), so why is it missing from Nucleo ?(I rather do it in NUCLEO, so t...
Hi everyone.I'm trying to setup the timer TIM8 in order to generate interrupts, using compare registers for this purpose. My intention is to use all the availablechannels. I'm testing with a first stop of 150 ticks (150us), but it never stops. The fu...
Hey evryone,I can't write to memory flash when TZEN = 1 (e.g trustzone is active) , i hav no error return !I call this fucntions from secure side : HAL_FLASH_Unlock(); HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, FlashAddr, FlashData); HA...
I can generate PWM using channels 1-4 but they would start at the same time.I want to generate one PWN and the other one would start with 500 us delay.Can somebody help with sample code. It is so easy with Arduino, there are so many sample codes, you...
In reference manual table 55 (Kernel clock distribution overview), there is a line for the DFSDM clock, indicating that it can be taken from either sys_ck or bus clock (which in the case of DFSDM would be APB2). That table also indicates that the max...
