What criteria (requirements) are used to determine the HSE clock has failed (sets the CSSF interrupt in the RCC_CIR register) on a stm32f103x processor?
Documentation simple says the HSE clock failed. What does "fail" define. Does "fail" imply that there are no clock oscillations applied to the HSE pins? Or a frequency below some value that will set the CSSF flag in the RCC_CIR register. What would b...