I'm trying to debug a 429 FreeRTOS app using LwIP, which periodically has a huge (1.5 second) delay whilst trying to pump out messages. Using Atollic 9.1.0, Segger debug code on Nucleo-429ZI board. I can stop the application when it pauses, but the F...
ADC control register 2 (ADC_CR2)Bits 27:24 EXTSEL[3:0]: External event select for regular groupThese bits select the external event used to trigger the start of conversion of a regular group:0000: Timer 1 CC1 event0001: Timer 1 CC2 event0010: Timer 1...
I have an application running on an stm23F0-discovery the code is quite simple:HAL_Init();SystemClock_Config()while(1);The code is built and debugged using IAR workbench 7.5The discovery clock config uses the internal HSI 8mHZ clock source. I have a...
Hi everyone,I recently read a lot of articles on the subject of SWD, SWO, and using SWV for debugging purposes. I configured my TrueSTUDIO project as stated by the article[1][2], however I have the following problem:When I send strings over SWD by re...
Posted on September 18, 2017 at 19:27 To ST Microelectronics (especially the programmers who work on HAL & STM32CubeMX): I see a lot of bellyaching on these forums (especially from knowledgeable grizzled veterans) complaining about the HAL (Hardw...
Hi,I use WWDG for my project.That work great in error case but i have some spontaneous activation.How can i configure WWDG to have a higher period?here my init,i'm i write to take WWDG_PRESCALER_8 instead of WWDG_PRESCALER_1?/** * @brief WWDG Initi...
Posted on October 10, 2017 at 05:27I configured comp1 with stm32cubemx, but I can not configure the COMP1 register, using COMP1-> CSR = 0x11; the value of COMP1_CSR is still zero.WHY？
Posted on April 22, 2009 at 17:25CAN Filter Setting
ADC consistently reads higher value for any channel which is 1st in the sequence. If I query this channel 2nd time as rank 2 (immediately after high value) then it reads normal value. Value is high by about 10%.Tested on stable input many-many times....
