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FDCAN Bittiming Problem __ STM32H750 __

Hi,my question is simple , i have these parameter :Can_Clock = 48 MHz Prescaler = 1;NominalTimeSeg1 = 18NominalTimeSeg2 = 4and this is the MX_FDCAN1_Init() :static void MX_FDCAN1_Init(void) {   /* USER CODE BEGIN FDCAN1_Init 0 */   /* USER CODE E...

DAC/ADC conversion + timer triggering

Posted on January 16, 2018 at 10:34Hello,I need to control the acquisition and generation of a signal using the STM32F746ZG and its internal DAC and ADC. The idea is to trigger the DAC using one timer and the ADC using another timer (without the use...

Openocd

I ported openocd to the stm32l522. ​​https://github.com/morbos/openocd-0.10.1​openocd -f board/st_nucleo_l522.cfg​​From there you can remote connect from gdb, flash, and see the s/ns processor regs. Watchpoints work also.​Hedley​​

Hedley by Associate III
  • 1008 Views
  • 3 replies
  • 4 kudos

Not Correctly Read ADC Conversion Through SPI Interface

Hello,On my custom designed PCB, there is a STM32F7 processor. With SPI DMA interface, I try to get the converting values of the external ADC. But everytime I get 3.1V in debug session. So how can I read the correct values based on the input signal?w...

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AE104 by Senior
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  • 4 replies
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IWDG debug freeze not working (for me!).

Hi all - Happy NY!I've a stm32H743ZI2 (nucleo) and am using the following code to init the IWDG   __HAL_RCC_WWDG1_CLK_ENABLE();   __HAL_DBGMCU_FREEZE_IWDG1(); //not working!!!?   // Reload = (LsiFreq(Hz) * Timeout(ms)) / (prescaler * 1000)   hiwdg.In...

ms1802 by Associate II
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STM32F756 FMC SRAM 8/16/32Bit data read and write loss...

Hi ST Communities,My hardware choose is IS61WV51216BLL SRAM, 512 * 16 bit, the question now is whether the written data and read data are different, there will be a part of the data loss when reading, now is not sure there is something wrong with the...

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ddavi.8 by Associate II
  • 559 Views
  • 0 replies
  • 0 kudos