HUnso.1

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‎2023-06-14

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Dear all, I am working on FDCAN with STM32G473 and I do not understand the example calculation of the Baudrate in chapter 43.4.7 in the following document RM0440 Rev 2 (en.DM00355726.pdf)

2020-02-03

bit time = [NTSEG1 + NTSEG2 + 3] tqAnd in the note With a CAN kernel clock of 48 MHz, the reset value of 0x06000A03 configures the FDCANfor a bit rate of 171 kbit/s.NSJW = 6NBRP = 0 => 1NTSEG1 = 10NTSEG2 = 3How do you get 171 kbit/s by 48 MHzBest Reg...