Why does the STM32H743 reference manual talk about Cortex-M4 on the SRAM pages?
In the RM0433 rev 7 in the Embedded SRAM chapter:AHB SRAM1 is mapped at address 0x3000 0000 and accessible by all system masters except BDMA through D2 domain AHB matrix. AHB SRAM1 can be used as DMA buffers to store peripheral input/output data in ...