STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
Hi,I tried to add a DMA for my ADC on STM32F767ZI with 216MHz. I just want to convert one Channel. In my Interface a select circular mode, enabled DMA continuous request, enabled Continuous conversation mode. When I start the DMA, my Buffer get fille...
I wonder when the STM32H7A/7B documentation will be available.The L5 documentation was released more than a year ago, and L5 is not yet available in stock at distributors. H7A / H7B are in stock and there is no sign of the documentation!
I am working on an automotive product that will interface with the vehicle's CAN bus network running at 500kbps. My question is, is the STM32F446 capable of reliable communication without a crystal? Or is it absolutely necessary? The last thing I wou...
Doing some electrical testing of a board I got back recently and It seems that the internal pullup of pin PA2 is applied at reset. Before flashing the device it seems that this pin is sitting high, and the voltage I see is consistent with the approx ...
Hi I'm Using STM32l552QE MCU, so downloaded the ibis model of that MCU,But i found that the same packages are differentiated with _p &_q( stm32l552_562_ufbga132_p,stm32l552_562_ufbga132 & stm32l552_562_ufbga132_q).Kindly help me to know difference.st...
0x1000 is listed twice (for A, 1.0 and Z, 1.1). Furthermore, I came across a G030J6 with 0x1001, which does not exist according to this table. Package bears 'Z' as rev code.
Mbed-os currently does not support STM32H745. When will the STM32H745 be used on mbed-os?
I can find examples in the STMF0 Cube folders for wakeup from STOP for various peripherals; however, I cannot find any examples of address mark detection wakeup for USART.I have attempted to implement the address mark detection wakeup via the descrip...
I am looking a STM board that contains the SPI controller that exercise the ssp_pl022_r1p3 prime cell IP, http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194g/DDI0194G_ssp_pl022_r1p3_trm.pdf.Thanks for your help for providing the information.