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Understanding Flash Operations

Anvi
Associate III

Hello,

I'm developing on an STM32F207 (datasheet). I am attempting to modify a couple of the internal Flash sectors (the 128kB sectors 10 & 11 to be specific). I'm trying to figure out how to do this in a way that will not block the CPU. Let's say I'm trying to write an entire 128 KB sector.

The F207's Flash is a single bank; my understanding is that means the CPU is blocked during Flash write operations and the Flash cannot be read until the write operation is complete.

The most common solution I've seen expressed is to place and execute the Flash operations in RAM; but won't this cause the same issue? The flash is still being written to. Won't this also prevent it from being read by the CPU?

Also, would it be possible to divert these operations to the DMA unit? If not, why?

Thank you

1 ACCEPTED SOLUTION

Accepted Solutions

You can't simultaneously read and write from FLASH, and write (and erase) takes time. The FLASH write, once started, is timed by hardware; for write/erase times see datasheet.

So, if the processor attempts to read from FLASH during FLASH write (erase) - either code or data - it will be stopped until the write (erase) is finished.

If the processor won't attempt to read from FLASH, while being written, it won't be blocked. So, you have to make sure that you execute only code from RAM and that that code won't attempt to read from FLASH. This includes the interrupt vector table and the interrupt routines themselves, for all interrupts which can occur during that time.

> Also, would it be possible to divert these operations to the DMA unit?

DMA could in theory *initiate* the FLASH write, but the limitation above - that during FLASH write the FLASH cannot be read - will still hold.

JW

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2 REPLIES 2

You can't simultaneously read and write from FLASH, and write (and erase) takes time. The FLASH write, once started, is timed by hardware; for write/erase times see datasheet.

So, if the processor attempts to read from FLASH during FLASH write (erase) - either code or data - it will be stopped until the write (erase) is finished.

If the processor won't attempt to read from FLASH, while being written, it won't be blocked. So, you have to make sure that you execute only code from RAM and that that code won't attempt to read from FLASH. This includes the interrupt vector table and the interrupt routines themselves, for all interrupts which can occur during that time.

> Also, would it be possible to divert these operations to the DMA unit?

DMA could in theory *initiate* the FLASH write, but the limitation above - that during FLASH write the FLASH cannot be read - will still hold.

JW

That makes much more sense to me now. Thank you!