Resolved! Question about the SPI communication clock
Question about the SPI communication clockIs it possible to output the SPI clock all the time, not just when reading and writing data?
Question about the SPI communication clockIs it possible to output the SPI clock all the time, not just when reading and writing data?
I am using a Nucleo-F401RE and wanted to look at the UART section. Ideally i wanted to see the pins go up and down to see what they are doing. I am using huart1 so the transmit is on PA9 and receive is on PA10. I've hooked up the logic analyzer to PA...
I got STM's libraries, grabbed the X-CUBE-DSPDEMO & AN4841 & AN4891 (section 3 on FFT demonstration) but haven't seen any documentation on the DSP library API. Have all the examples which are great, but still a good documentation for reference would ...
Hi, I am using a STM32U5G9VJT6Q and need the Altium symbol. Because it is a relatively large IC I would rather copy-paste the names and pin numbers pairs to avoid any errors (not out of laziness), but: - if I copy and paste the pin names (or any othe...
When I'm trying to read Unique device ID register on Nucleo-H563ZI, either by using HAL_GetUIDw0() or by doing uint32_t uid1 = *((uint32_t*)0x08FFF800); hard fault occurs.
I am using STM32H743VI LQFP 100 pin. There is no PC2 and no PC3 so I need to use PC2_C and PC3_C as SPI MISO and MOSI respectively. I heave read many forums on here claiming there was a bug in the silicon making PC3_C not suitable for SPI communicati...
Hi,I am looking for a STM32 micro that can control this DSI display (datasheet attached).But the display has 4-lanes DSI interface and cannot seem to find any STM32 with 4-lanes DSI. The microcontroller selector tool only has "MIPI-DSI" option withou...
Our board has an STM32L031 as a SPI master with two AD5271 Digital Pots (R24 and R25) as SPI slaves. After power-on both digital pots can be read (return default of 511). The first digital pot accessed can be given a new value and that new value re...
Hello,in the STM32F7 it is possible to enable instruction prefetch and in the same time disable ICache. Then I suppose that the prefetching does not put the prefetched instruction in cache. Is it correct?Thank you
Hi!I would like to know if there is a way to handle "automaticaly" a transmit then receive transfert using SPI and DMA ?I think using linked list should be possible, but i don't know how to configure that.. -Create a single linked list (only 1 GPDMA...