STM32 MCUs Products

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Resolved! Where is the documentation for the CMSIS-DSP library

I got STM's libraries, grabbed the X-CUBE-DSPDEMO & AN4841 & AN4891 (section 3 on FFT demonstration) but haven't seen any documentation on the DSP library API. Have all the examples which are great, but still a good documentation for reference would ...

armDevCP by Associate II
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Resolved! PC2_C PC3_C on STM32H743VI

I am using STM32H743VI LQFP 100 pin. There is no PC2 and no PC3 so I need to use PC2_C and PC3_C as SPI MISO and MOSI respectively. I heave read many forums on here claiming there was a bug in the silicon making PC3_C not suitable for SPI communicati...

Resolved! Micro to control 4-lanes DSI display?

Hi,I am looking for a STM32 micro that can control this DSI display (datasheet attached).But the display has 4-lanes DSI interface and cannot seem to find any STM32 with 4-lanes DSI. The microcontroller selector tool only has "MIPI-DSI" option withou...

Ricko by Senior III
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Resolved! 'L031 SPI master with multiple AD5271 slaves

Our board has an STM32L031 as a SPI master with two AD5271 Digital Pots (R24 and R25) as SPI slaves.  After power-on both digital pots can be read (return default of 511).  The first digital pot accessed can be given a new value and that new value re...

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StevenG by Associate II
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  • 1 replies
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Resolved! Instruction prefetch and cache in STM32F7

Hello,in the STM32F7 it is possible to enable instruction prefetch and in the same time disable ICache. Then I suppose that the prefetching does not put the prefetched instruction in cache. Is it correct?Thank you

GGran.2 by Associate III
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  • 8 replies
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SPI with GPDMA

Hi!I would like to know if there is a way to handle "automaticaly" a transmit then receive transfert using SPI and DMA ?I think using linked list should be possible, but i don't know how to configure that..  -Create a single linked list (only 1 GPDMA...

Rickou73 by Associate II
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  • 4 replies
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