STM32 MCUs Products

Ask questions, find answers, and share insights on STM32 products and their technical features.

cancel
Showing results for 
Search instead for 
Did you mean: 

Forum Posts

Resolved! Full form of STM

Hello all,I'm new to the STM microcontroller, I want to know the full form of STM. I searched the google but can't get.Thanks and regards,Srikanth M

Csrik.1 by Associate II
  • 11742 Views
  • 6 replies
  • 0 kudos

I2C on STM32G474QE don't works

The I2C4 on the STM32G474QE (128 pins) don't works .There is a delay between the clock signals on the I2C busThe i2C bus was configured for 400Khz.Has anyone an ide why we have this delays between the clock?When we execute the same code on a nucleo-...

OGhis by Senior
  • 468 Views
  • 1 replies
  • 0 kudos

DWT not running on STM32L5 with Debugger NOT connected

Hello community,I implemented a microsecond delay on a STM32L5 microprocessor using the "Data watchpoint and trace unit" (DWT). I am initialising the unit and count the DWT->CYCCNT down until my delay has passed.This works totally fine when the Debug...

MPetr.3 by Associate III
  • 685 Views
  • 0 replies
  • 0 kudos

How does STM32G4 Series FDCAN Tx Queue Addressing work?

The STM32G4 Series Reference manual RM0440 states in section 44.3.3 Message RAM → Tx Queue on page 1965:A Tx Queue Buffer allocates eighteen 32-bit words in the Message RAM. Therefore the start address of the next available (free) Tx Queue Buffer is ...

LFröh.1 by Associate
  • 575 Views
  • 0 replies
  • 0 kudos

Resolved! STM32F7 Configurable Interrupt Priority levels

Hello ST,From datasheet(PM0253), The SHPR1-SHPR3 registers set the priority level, 0 to 255 of the exception handlers that have configurable priority.Also from datasheet,Each PRI_n field is 8 bits wide, but the processor implements only bits[7:M] of ...

SPI CMD24 Write Block issure

I am trying to write data into 16GB micro SD card(ADATA Premier microSDHC UHSI class10). initialization is O.K.I am using an HAL_SPI_Transmit(&hspi1,wr_buf,6,100) commandProgram is as follows:             #define CMD24    (0x40+24)    /* WRITE_BLOCK ...

STai.2 by Associate II
  • 441 Views
  • 0 replies
  • 0 kudos

Resolved! How to enable I2C Clock stretching

Hi ST.​I'm using STM32 L4P5 as a Master in I2C.​slave device is slow to write data, so I did the slave device do clock stretching for a moment.​Is there any enable related to clock stretching on L4P5?​If so, what's the way to enable it?​thank you​

JPark.20 by Associate II
  • 3083 Views
  • 2 replies
  • 0 kudos

STM32L451 and PC13/14/15 in SHUTDOWN Mode

Documentation is a bit vague with respect to use of PC13/14/15 as GPIO while MCU is in SHUTDOWN mode. My understanding is that these pins can be used in the backup domain (my VBAT is connected directly to VDD).I understand that I could SINK up to 3mA...

0693W000008zDLBQA2.png

Best practice to modifying DMA accessed memory?

Hello,I have a general question about DMA which I am currently using to transfer a LUT in the memory to control PWM output.The LUT changes periodically and at the moment the DMA is triggered with a timer. What I would like to know if it is safe to ch...

SKILA by Associate II
  • 695 Views
  • 1 replies
  • 0 kudos

Resolved! Can DMA CR TCIE bit be changed, when DMA is enabled?

Hello.I'm testing ADC with DMA on STM32G071. I wanted to have interrupt on transfer complete, but I had trouble clearing TCIF flag in ICFR register. Even if I cleared the bit, ISR was entered again immediately. I don't have circular mode set neither ...

AMak.2 by Associate II
  • 1564 Views
  • 6 replies
  • 0 kudos