Is it possible to reset TIM3 Count register by hardware using an External Pin?
Hello,In my application I need to clear TIM 3 Counter on Rising Edge of an external Pin.My target MCU is STM32C011Is there any example available? ThanksAlfonso
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To correct PTP register bit-description (stm32f767xx.h)
in file stm32f767xx.h /* Bit definition for Ethernet PTP Time Stamp Status Register */#define ETH_PTPTSSR_TSTTR_Pos (5U) #define ETH_PTPTSSR_TSSO_Pos (4U) need replace to /* Bit definition for Ethernet PTP Time Stamp Status Register */#define ETH_...
OSPI in Quad SPI Mode Configuration
Hi Everyone, I have W25Q256JV and STM32L562CEU6 with 38 Pin Package and have OSPI (Single SPI, Dual SPI and Quad SPI option only). Below is my Clock Settings, OSPI (Quad SPI) with Quad Lines Settings and Error Status during Write Enable and main.c fi...
Strange, unexpected behavior of memory bus pins during reset – silicon bug in STM32H743I rev. V
Hi. We found a serious problem in the behavior of the memory bus pins during reset.Our design uses an STM32H743I CPU and non-volatile MRAM/FRAM memory connected via a bus. We use the FMC controller to access the memory, the bus pins are set up, and ...
Resolved! STM32H7 with 32bit bus SDRAM GPIO assignment
Hi,Can I connect a 32bit bus SDRAM to STM32H7 and assign the FMC IOs as I wish or should I stick with the Alternate functions of the GPIOs?Specifically: can I map 32 GPIOs to STM32H7 models with 144 LQFP package where the GPIO for D31, D30 etc.... (...
SD Card over SPI
Hi I have an SD card working on a Nucleo-F439 board, but I can’t get it to work on the Nucleo-H729. I'm using the code from https://deepbluembedded.com/stm32-sd-card-spi-fatfs-tutorial-examples/, but I receive no response on the SPI interface during ...
Flash and RAM integrity check
How can i do the integrity check for flash and RAM in STM32H735?.Please guide me.
Reset product state to open by firmware with mass erase
Hello.Is it possible to reset the product state from closed to openinternaly by the firmware on a STM32H563?Can i do this easy by rewriting the ProductState to 0xED, or do i need additional provision information or the provisioning password to do thi...
SPI+GPDMA Configuration
Besides, I don't know whether this configuration of MX is correct. /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_SPI2_Init(); MX_ICACHE_Init(); MX_I2C1_Init(); MX_RTC_Init(); /* USER CODE BEGIN 2 */ ...
What is the speed of SRAM in STM32H7?
The STM32H743 datasheet section 3.3.2 states that the TCM memories are zero wait state, implying that they run at the core speed of up to 480MHz. It does not make any claim about the rest of the SRAM. Figure 2 in the datasheet shows all the AXI and...
