STM32 MCUs Products

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Resolved! STM32G4 Timer Input Filter. Can I read the filtered input pin directly or is it only routed to the timer block?

we use the timer capture for Hall inputs. we were able to program the XOR input using the filter and can geneate an interrupt, but I also want to read the individual inputs using the filter.feature. When I read the corresponding IDR it seems it is ...

rfish.749 by Associate II
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  • 3 replies
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DAC Outputs Not Equal

Hello,I use the internal DAC of the processor. Even the initial value of the DACs are equal, I got 1V out from the first output of the DAC, and 2V output from the other DAC output. Why is that happen?/* USER CODE BEGIN PV */   // DAC Settings   float...

AE104 by Senior
  • 1221 Views
  • 6 replies
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CANFD multiple senders - Tx Issues

I've been doing the majority of my FDCAN development with 1 or 2 nodes.Recently, I have expanded my "network" to 7 nodes. 4 of these nodes send data at the same time.(I mean, 1 second intervals from power up. They are all powered simultaneously)With ...

Online STM32 selector

Anybody noticed?https://www.st.com/content/st_com/en/stm32-mcu-product-selector.htmlFor what it's worth. After oh so many years.JW@Lina DABASINSKAITE​ , this is example of information which would need to come from ST here, regularly. This is what wou...

STM32F427 - No SPI4 Communication

Currently, I am seeing no signals on the SCLK and MISO/MOSI lines on the SPI4 lines from a STM32F427 chip to a SPI flash during an attempted read/write. At the moment, I've done the following:Enable GPIO clock (HB1) and SPI clock (PB2)Configure CS:pi...

RPham.1 by Associate
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  • 3 replies
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Resolved! native i3c support

Any chance STM32 MCUs will adopt native i3c support any time soon? Many new devices, including some from ST (like the LPS22HH), support it. It's a compelling (new-ish) standard.

TB by Associate III
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  • 9 replies
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Resolved! SRAM parity flag not set in NMI handler

Hi allI'm trying to distinguish between the interrupt sources in the NMI handler on a STM32G031 - particularly the RAM parity error.I have everything in place and I can provoke a parity error. The NMI ISR is called as expected, but if the SYSCFG_CFGR...

awalti by Associate II
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  • 4 replies
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