In an earlier project based on STM32F7x, we had to add memory remapping by hand:SYSCFG->MEMRMP = 0x01;There is no equivalent in SYSCFG for STMU575, nor did I find relevant bits under SYSCFG->CFGR1 or CFGR1->CFGR2 or other field as part of SYSCFG.
I'm using the STM32F411RE and I want to communicate with the SPI protocole to an external chip. The version of the chip is basically two single chip on 1 board so the SPI wiring only takes 1 CLK and 1 CS, but is using two MOSI line and two MISO line ...
Hi all, This is my first time in stm32 mcu's and since today i struggled to manage to install all needed software to my old win7 pc. Finally at 2am i managed to success. Then after desided to program my bluepill quick before go to sleep. I started wi...
For a specific task at my workstation, I need to cache a variable before the watchdog reset and query it again after the reset. For this I have implemented a timer that writes the variable to RAM just before the watchdog. For this I defined according...
I need to have 2 adcs triggered simultaneously. Since i desire 3 differential inputs per ADC for the Nucleo F303zre board i can use ADC 1 and ADC3 . STM32CuneIDE shows the Timer 20 trigger out event is available for both ADC triggering so i intend to...
Hello, I am trying to make a norflash flash loader by developing stm32f429zit6, M29W256GL custom board.I'm struggling with a lack of data.I would like to refer to a sample based on cubemx.Are there any documentation and sample sources that could help...
using Nucleof446REI have set my prescaler value -700ARR- 60628TIM6_clk =85MHzWhich would create 0.5s delay in toggle led PA5and also added (main code)HAL_TIM_Base_Start(&htim); And Void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){H...
STM32L072CZTxPVD is configured to trigger INT16 and wake up the MCU.It is working with the MCU in Sleep mode.However, when the MCU is in Stop mode the interrupt does not trigger.After reading RM0376 I am unsure if PVD is supposed to work in Stop mode...
Hello everyone! I was wondering what might go wrong with I2S DMA configured in normal mode for audio streaming with double-buffering technique. I'm not talking about circular buffer here (ping-pong) where a single buffer is used in halves in HC and T...
I cannot find this information in the NUCLEO-64 ref. manual. Do NUCLEO-64 boards generate a 5V UART TX-signal with an external 5V power supply (E5V pin)? Thank you.
