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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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STM32F103 PA15 as GPIO

Posted on October 25, 2012 at 21:49Hello, I�m trying to use PA15 pin as an output on STM32F103CB chip, but with no luck. Because this pin is shared for JTAG, I must use remapping, First I enable clocks: RCC->APB2ENR |= RCC_APB2Periph_TIM1 |         ...

r2d2 by Associate II
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changing irq handler

Posted on October 25, 2012 at 16:17What is the best way to change the irqhandler to be used. I have a number of situations where the operations need to change depending on what the board is doing. Don't want to have a load of ifs or switches inside ...

gurnett2 by Associate II
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low power STM32L speculation

Posted on October 25, 2012 at 16:25Hi. Erased state of flash memory in STM32L low-power devices is 0 instead of more common 1. What is the reason for this? If I will program unused flash portion to all FFh, will this impact current consumption in an...

jgoril2 by Associate II
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SPI1 DMA channel/stream

Posted on October 25, 2012 at 14:38Where do I find out what DMA channel/stream i need to use for SPI1 TX.not sure which st document has this information in it?(stm32f4)Thanks :)

russdx by Associate II
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Flashing STM32F405 with ST link utility

Posted on October 24, 2012 at 21:07Hi all,After flashing my board based on a STM32F405RG with ST link utility (Hex compiled with GCC under eclipse), I can't communicate anymore with the core. I have this error :Cannot run core while booting from fla...

neoirto by Associate II
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ST32f4discovery+sdcard+fatfs problem

Posted on June 30, 2012 at 23:43Hello, i have a small problem i think.With the help of this forum and google i created a project with CoIDE.What it should do is reading the directory of an SDCARD.The SDCARD part is working. but the fatfs is not work...

arnold by Associate II
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Using CCM (or other ram) to store critical functions

Posted on October 23, 2012 at 13:50 Hi. I am using a STM32F4discoveryboard to prototype an application. In the application, I have some really critical interrupt that must be handled (or else there will be an uncontrolled surge of over 80...

marbel by Associate II
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Event Register workaround for M3

Posted on October 25, 2012 at 01:55For Cortex-M3 processors, there is a bug that prevents the event register from being set on interrupt entry or exit. This can cause problems if an interrupt occurs in an event loop before the WFE instruction is exe...

EOC interrupt for ADC

Posted on October 22, 2012 at 16:42  The original post was too long to process during our migration. Please click on the attachment to read the original post.

orn by Associate II
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