Noise reduction from an SDIO bus
Posted on August 24, 2013 at 19:12Hi all,I'm designing a MICROSD SDIO bus on a future PCB with a splitted ground plane below all D0-D3, CMD, CLK and SD_VDD to decrease noise, but I can't find a way to ''totaly'' cover the D0 and D1 traces (LQFP64 ST...