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Posted on April 26, 2018 at 10:16Hi, The port.c file for the same FreeRTOS version [8.2.3] have a difference. In the Official FreeRTOS release: configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); configPOST_SLEEP_PROCESSING( xExpectedIdleT...
Posted on March 28, 2017 at 02:43Section 6.15 of document UM2033 states the vcp serial interface of an stm32f769i-discovery is on usart3. it is not. it is on usart1.
Posted on February 10, 2018 at 16:06DocID029085 Rev 2Section 6.15 Virtual COM PortMakes reference to USART3, no other reference in document, and VCP uses USART1 PA9/PA10http://www.st.com/content/ccc/resource/technical/document/user_manual/group0/7c/...
Posted on April 26, 2018 at 11:56Hello,I have been stuck on this for two whole work days. I have been trying to establish any connection between an ST-Link/V2 and a STM32F411RCT6 MCU but I just get USB error every time on STM32 Utility and on STM Cu...
Posted on April 26, 2018 at 12:13Hello , Is there any pin on stm32f446re nucleo board which can tell CPU is active or sleeping ? basically i want to know when CPU goes to sleep and when it wakes up by monitoring a gpio . i dont have dont have power...
Posted on April 11, 2018 at 10:04need code for LED ON and OFF for STM32L162VE HW
Posted on April 26, 2018 at 15:06When I click Get Software/download links, nothing happens. I have to Login because I don't want write a working email everytime and some bogus short name. After a long wait I seem to get file.
Posted on April 01, 2018 at 12:36Hello everyone, I had a question about how to run IRTIM on STM32F030. If there is an answer please tell me how to solve it?
Posted on April 19, 2018 at 21:26Are there plans to fully support the STM32H7 PLL fractional multiplier (PLLFRACN) for all 3 PLLs in STM32CubeMX? The RCC Configuration allows the PLL1 fractional value to be set, but not for PLL2 and PLL3. Setting th...
Posted on April 23, 2018 at 07:40Hello.MCU: STM32L432KC. I'm trying to use SAI1 peripheral in master mode with master clock (MCLK) generation. I've found MCLK has drop pulses. You can see this at attached picture.Clock configuration:1. LSE with crys...
