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LSE Clock Output Missing Pulses on NUCLEO-F767ZI

I used STM32CubeMX to build a very simple test case to output both the High Speed Clock (HSE) and Low Speed Clock (LSE) on output pins. I selected "Master Clock Output 1" and Master Clock Output 2" when I configured the input clocks. The HSE clock ...

MPatt.11 by Associate II
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No MOSI PULSE if use SPI re-mapped

Posted on February 28, 2013 at 04:03A am using STM32F103T4, a low density device, and want to use the re-mapped SPI1. Below is my implementation:  /* GPIO and AFIO clock enable */  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO| RCC_APB2Periph_GPIOB, EN...

ronrafer by Associate
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STM32L051 TIM21 trigger output issue

Hi,Using the following code, ADC can be triggered by TIM22 successfully./** * @fn static void ADC_Config(void) * * @brief ADC configuration. */ static void ADC_Config(void) { /* Enable clock */ RCC->AHBENR |= RCC_AHBENR_DMAEN; RCC-...

Resolved! RAM not getting written before reset on stm32f769n

I am working on a hard fault handler were I want to store some key values into ram before resetting. This data will then be further handled at next boot up.My problem is that the data does not get written into RAM unless I step through the writing co...

[STM32F4xx] Only 16 GPIO under control?

The STM32F4xx reference manual (RM0090) specifies under the GPIO main features section that there are "up to 16 I/Os under control" - does this mean I cannot control more than 16 GPIO pins or am I interpreting this incorrectly?

hjm by Associate II
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